Vol. E88-C, No. 4 April 2005

Published: 2005-04-01

Foreword

FOREWORD

Koichiro ISHIBASHI

467-467
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FOREWORD

Eisuke TOKUMITSU

639-639
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Letters

Power Optimization of an 8051-Compliant IP Microcontroller

Luca FANUCCI, Sergio SAPONARA, Alexander MORELLO

597-600
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An All-Digital CMOS Duty Cycle Correction Circuit with a Duty-Cycle Correction Range of 15-to-85% for Multi-Phase Applications

Jang-Jin NAM, Hong-June PARK

773-777
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Papers

A 1-V Cyclic A/D Converter Using FD-SOI Sample/Hold Circuits for Sensor Networks

Jun TERADA, Yasuyuki MATSUYA, Shin'ichiro MUTOH, Yuichi KADO

479-483
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Sub-1-V Power-Supply System with Variable-Stage SC-Type DC-DC Converter Scheme for Ambient Energy Sources

Yoshifumi YOSHIDA, Fumiyasu UTSUNOMIYA, Takakuni DOUSEKI

484-489
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A 2.4-GHz Temperature-Compensated CMOS LC-VCO for Low Frequency Drift Low-Power Direct-Modulation GFSK Transmitters

Toru TANZAWA, Kenichi AGAWA, Hiroyuki SHIBAYAMA, Ryota TERAUCHI, Katsumi HISANO, Hiroki ISHIKURO, Shouhei KOUSAI, Hiroyuki KOBAYASHI, Hideaki MAJIMA, Toru TAKAYAMA, Masayuki KOIZUMI, Fumitoshi HATORI

490-495
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CMOS Radio Design for Complete Single Chip GPS SoC

Norihito SUZUKI, Takahide KADOYAMA, Masayuki KATAKURA

496-501
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A 300-MHz-Band, Sub-1 V and Sub-1 mW CMOS SAW Oscillator Suitable for Use in RF Transmitters

Minoru KOZAKI, Norio HAMA

502-508
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Dynamic Voltage and Frequency Management for a Low-Power Embedded Microprocessor

Takahiro SEKI, Satoshi AKUI, Katsunori SENO, Masakatsu NAKAI, Tetsumasa MEGURO, Tetsuo KONDO, Akihiko HASHIGUCHI, Hirokazu KAWAHARA, Kazuo KUMANO, Masayuki SHIMURA

520-527
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A 4500 MIPS/W, 86 µA Resume-Standby, 11 µA Ultra-Standby Application Processor for 3G Cellular Phones

Makoto ISHIKAWA, Tatsuya KAMEI, Yuki KONDO, Masanao YAMAOKA, Yasuhisa SHIMAZAKI, Motokazu OZAWA, Saneaki TAMAKI, Mikio FURUYAMA, Tadashi HOSHI, Fumio ARAKAWA, Osamu NISHII, Kenji HIROSE, Shinichi YOSHIOKA, Toshihiro HATTORI

528-535
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Low-Power Network-Packet-Processing Architecture Using Process-Learning Cache for High-End Backbone Router

Michitaka OKUNO, Shin-ichi ISHIDA, Hiroaki NISHI

536-543
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An Energy-Efficient Clustered Superscalar Processor

Toshinori SATO, Akihiro CHIYONOBU

544-551
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A Resource-Shared VLIW Processor for Low-Power On-Chip Multiprocessing in the Nanometer Era

Kazutoshi KOBAYASHI, Masao ARAMOTO, Hidetoshi ONODERA

552-558
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A Low-Power Systolic Array Architecture for Block-Matching Motion Estimation

Junichi MIYAKOSHI, Yuichiro MURACHI, Koji HAMANO, Tetsuro MATSUNO, Masayuki MIYAMA, Masahiko YOSHIMOTO

559-569
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An Exact Leading Non-Zero Detector for a Floating-Point Unit

Fumio ARAKAWA, Tomoichi HAYASHI, Masakazu NISHIBORI

570-575
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Design Optimization of a High-Speed, Area-Efficient and Low-Power Montgomery Modular Multiplier for RSA Algorithm

Shoichi MASUI, Kenji MUKAIDA, Masahiko TAKENAKA, Naoya TORII

576-581
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A Sub-0.5 V Differential ED-CMOS/SOI Circuit with Over-1-GHz Operation

Takakuni DOUSEKI, Toshishige SHIMAMURA, Nobutaro SHIBATA

582-588
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Dynamic Power-Supply and Well Noise Measurements and Analysis for Low Power Body Biased Circuits

Kenji SHIMAZAKI, Makoto NAGATA, Takeshi OKUMOTO, Shozo HIRANO, Hiroyuki TSUJIKAWA

589-596
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Improvement in Retention/Program Time Ratio of Direct Tunneling Memory (DTM) for Low Power SoC Applications

Kouji TSUNODA, Akira SATO, Hiroko TASHIRO, Toshiro NAKANISHI, Hitoshi TANAKA

608-613
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The Umbrella Cell: A High-Density 2T Cell for SOC Applications

Satoru AKIYAMA, Takao WATANABE, Nobuhiro OODAIRA, Tsuyoshi ISHIKAWA, Digh HISAMOTO

614-621
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Embedded Low-Power Dynamic TCAM Architecture with Transparently Scheduled Refresh

Hideyuki NODA, Kazunari INOUE, Hans Jurgen MATTAUSCH, Tetsushi KOIDE, Katsumi DOSAKA, Kazutami ARIMOTO, Kazuyasu FUJISHIMA, Kenji ANAMI, Tsutomu YOSHIHARA

622-629
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0.3-1.5 V Embedded SRAM Core with Write-Replica Circuit Using Asymmetrical Memory Cell and Source-Level-Adjusted Direct-Sense-Amplifier

Toshikazu SUZUKI, Yoshinobu YAMAGAMI, Ichiro HATANAKA, Akinori SHIBAYAMA, Hironori AKAMATSU, Hiroyuki YAMAUCHI

630-638
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Electrical Characterization of Aluminum-Oxynitride Stacked Gate Dielectrics Prepared by a Layer-by-Layer Process of Chemical Vapor Deposition and Rapid Thermal Nitridation

Hideki MURAKAMI, Wataru MIZUBAYASHI, Hirokazu YOKOI, Atsushi SUYAMA, Seiichi MIYAZAKI

640-645
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Characterization of Atom Diffusion in Polycrystalline Si/SiGe/Si Stacked Gate

Hideki MURAKAMI, Yoshikazu MORIWAKI, Masafumi FUJITAKE, Daisuke AZUMA, Seiichiro HIGASHI, Seiichi MIYAZAKI

646-650
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Thermally Robust Nickel Silicide Process for Nano-Scale CMOS Technology

Soon-Young OH, Jang-Gn YUN, Bin-Feng HUANG, Yong-Jin KIM, Hee-Hwan JI, Sang-Bum HUH, Han-Seob CHA, Ui-Sik KIM, Jin-Suk WANG, Hi-Deok LEE

651-655
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Separation by Bonding Si Islands (SBSI) for Advanced CMOS LSI Applications

Takashi YAMAZAKI, Shun-ichiro OHMI, Shinya MORITA, Hiroyuki OHRI, Junichi MUROTA, Masao SAKURABA, Hiroo OMI, Tetsushi SAKAI

656-661
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Effects of Electric Field on Metal-Induced Lateral Crystallization under Limited Ni-Supply Condition

Gou NAKAGAWA, Noritoshi SHIBATA, Tanemasa ASANO

662-666
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Low Temperature Poly-Si Thin Film Transistor on Plastic Substrates

Jang Yeon KWON, Do Young KIM, Hans S. CHO, Kyung Bae PARK, Ji Sim JUNG, Jong Man KIM, Young Soo PARK, Takashi NOGUCHI

667-671
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Composite-Collector InGaP/GaAs HBTs for Linear Power Amplifiers

Takaki NIWA, Takashi ISHIGAKI, Naoto KUROSAWA, Hidenori SHIMAWAKI, Shinichi TANAKA

672-677
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Low Phase Noise, InGaP/GaAs HBT VCO MMIC for Millimeter-Wave Applications

Satoshi KURACHI, Toshihiko YOSHIMASU

678-682
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Evaluation of Surface States of AlGaN/GaN HFET Using Open-Gated Structure

Daigo KIKUTA, Jin-Ping AO, Yasuo OHNO

683-689
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Low On-Voltage Operation AlGaN/GaN Schottky Barrier Diode with a Dual Schottky Structure

Seikoh YOSHIDA, Nariaki IKEDA, Jiang LI, Takahiro WADA, Hironari TAKEHARA

690-693
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High Ruggedness Power MOSFET Design by a Self-Align p⁺ Process

Feng-Tso CHIEN, Ming-Hung LAI, Shih-Tzung SU, Kou-Way TU, Ching-Ling CHENG

694-698
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Novel 4RTD Logic Circuits

Hideaki YAMADA, Takao WAHO

699-704
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Characterization of Germanium Nanocrystallites Grown on SiO₂ by a Conductive AFM Probe Technique

Katsunori MAKIHARA, Yoshihiro OKAMOTO, Hideki MURAKAMI, Seiichiro HIGASHI, Seiichi MIYAZAKI

705-708
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Charging and Discharging Characteristics of Stacked Floating Gates of Silicon Quantum Dots

Taku SHIBAGUCHI, Mitsuhisa IKEDA, Hideki MURAKAMI, Seiichi MIYAZAKI

709-712
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TE Plane Wave Reflection and Transmission from a One-Dimensional Random Slab

Yasuhiko TAMURA, Junichi NAKAYAMA

713-720
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Optimal Position of Isolator to Suppress Double Rayleigh Backscattering Noise in Fiber Raman Amplifiers

Wenning JIANG, Jianping CHEN, Junhe ZHOU

721-724
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A Temperature and Supply Independent Bias Circuit and MMIC Power Amplifier Implementation for W-CDMA Applications

Youn Sub NOH, Jong Heung PARK, Chul Soon PARK

725-728
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Harmonic-Injected Power Amplifier with 2nd Harmonic Short Circuit for Cellular Phones

Shigeo KUSUNOKI, Tadanaga HATSUGAI

729-738
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Application of the Eigen-Mode Expansion Method to Power/Ground Plane Structures with Holes

Ping LIU, Zheng-Fan LI

739-743
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Multicarrier Power Amplifier Linearization Based on Artificial Intelligent Methods

Masoud FAROKHI, Mahmoud KAMAREI, S. Hamaidreza JAMALI

744-752
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Design Techniques of Delay-Locked Loop for Jitter Minimization in DRAM Applications

In-Young CHUNG, Youngsoo SOHN, Wonki PARK, Changhyun KIM

753-759
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Row-by-Row Dynamic Source-Line Voltage Control (RRDSV) Scheme for Two Orders of Magnitude Leakage Current Reduction of Sub-1-V-V_DD SRAM's

Kyeong-Sik MIN, Kouichi KANDA, Hiroshi KAWAGUCHI, Kenichi INAGAKI, Fayez Robert SALIBA, Hoon-Dae CHOI, Hyun-Young CHOI, Daejeong KIM, Dong Myong KIM, Takayasu SAKURAI

760-767
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An 8b 220 MS/s 0.25 µm CMOS Pipeline ADC with On-Chip RC-Filter Based Voltage References

Young-Jae CHO, Hyuen-Hee BAE, Seung-Hoon LEE

768-772
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Invited Papers

Low-Power Design of High-Speed A/D Converters

Shoji KAWAHITO, Kazutaka HONDA, Masanori FURUTA, Nobuhiro KAWAI, Daisuke MIYAZAKI

468-478
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Standby and Active Leakage Current Control and Minimization in CMOS VLSI Circuits

Farzan FALLAH, Massoud PEDRAM

509-519
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A 13.56 MHz CMOS RF Identification Passive Tag LSI with Ferroelectric Random Access Memory

Shoichi MASUI, Toshiyuki TERAMOTO

601-607
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