0.3-1.5 V Embedded SRAM Core with Write-Replica Circuit Using Asymmetrical Memory Cell and Source-Level-Adjusted Direct-Sense-Amplifier

Authors

• Toshikazu SUZUKI
• Yoshinobu YAMAGAMI
• Ichiro HATANAKA
• Akinori SHIBAYAMA
• Hironori AKAMATSU
• Hiroyuki YAMAUCHI