Vol. E90-A, No. 2 February 2007

Published: 2007-02-01

Foreword

FOREWORD

Shigetaka TAKAGI

309-309
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Letters

4-GHz Inter-Stage-Matched SiGe HBT LNA with Gain Enhancement and No Noise Figure Degradation

Chinchun MENG, Jhin-Ci JHONG

398-400
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A 5.2 GHz 47 dB Image Rejection Double Quadrature Gilbert Downconverter Using 0.35 µm SiGe HBT Technology

Tzung-Han WU, Chinchun MENG, Tse-Hung WU, Guo-Wei HUANG

401-405
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Spice-Oriented Frequency-Domain Analysis of Nonlinear Electronic Circuits

Junji KAWATA, Yousuke TANIGUCHI, Masayoshi ODA, Yoshihiro YAMAGAMI, Yoshifumi NISHIO, Akio USHIDA

406-410
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On the Equivalent of Structure Preserving Reductions Approach and Adjoint Networks Approach for VLSI Interconnect Reductions

Ming-Hong LAI, Chia-Chi CHU, Wu-Shiung FENG

411-414
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Lyapunov-Based Error Estimations of MIMO Interconnect Reductions by Using the Global Arnoldi Algorithm

Chia-Chi CHU, Ming-Hong LAI, Wu-Shiung FENG

415-418
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Implementations of Low-Cost Hardware Sharing Architectures for Fast 88 and 44 Integer Transforms in H.264/AVC

Chih-Peng FAN, Yu-Lian LIN

511-516
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Observer-Based Robust Tracking Control with Preview Action for Uncertain Discrete-Time Systems

Hidetoshi OYA, Kojiro HAGINO, Masaki MATSUOKA

517-522
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Stability-Guaranteed Horizon Size for Receding Horizon Control

Zhonghua QUAN, Soohee HAN, Wook Hyun KWON

523-525
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Comments on the Security Proofs of Some Signature Schemes Based on Factorization

Wakaha OGATA, Naoya MATSUMOTO

526-530
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Sufficient Conditions for a Regular LDPC Code Better than an Irregular LDPC Code

Shinya MIYAMOTO, Kenta KASAI, Kohichi SAKANIWA

531-534
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Enhancement of ZCZ Sequence Set Construction Procedure

Hideyuki TORII, Makoto NAKAMURA

535-538
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Secure Route Discovery Protocol for Ad Hoc Networks

YoungHo PARK, Hwangjun SONG, KyungKeun LEE, CheolSoo KIM, SangGon LEE, SangJae MOON

539-541
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Papers

A 4-mm-Square Miniaturized Doherty Power Amplifier Module for W-CDMA Mobile Terminals

Takayuki KATO, Keiichi YAMAGUCHI, Yasuhiko KURIYAMA, Hiroshi YOSHIDA

310-316
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Analytical Expression Based Design of a Low-Voltage FD-SOI CMOS Low-Noise Amplifier

Takao KIHARA, Guechol KIM, Masaru GOTO, Keiji NAKAMURA, Yoshiyuki SHIMIZU, Toshimasa MATSUOKA, Kenji TANIGUCHI

317-325
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10-GHz SiGe BiCMOS Sub-Harmonic Gilbert Mixer Using the Fully Symmetrical and Time-Delay Compensated LO Cells

Tzung-Han WU, Chinchun MENG

326-332
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Transfer Function Preserving Transformations on Equal-Ripple RC Polyphase Filters for Reducing Design Efforts

Hiroaki TANABE, Hiroshi TANIMOTO

333-338
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Synthesis Method of All Low-Voltage CMOS Instantaneous-Companding Log Domain Integrators

Ippei AKITA, Kazuyuki WADA, Yoshiaki TADOKORO

339-350
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Jitter Tolerant Continuous-Time Sigma-Delta A-D Converter Employing In-Loop Low-Pass Filter

Daisuke KOBAYASHI, Shigetaka TAKAGI, Nobuo FUJII

351-357
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A 10-bit 800-Column Low-Power RAM Bank Including Energy-Efficient D-Flip-Flops for a Column-Parallel ADC

Shunsuke OKURA, Tetsuro OKURA, Bogoda A. INDIKA U.K. (none), Kenji TANIGUCHI

358-364
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A 1.2-V, 12-bit, 200 MSample/s Current-Steering D/A Converter in 90-nm CMOS

Takeshi UENO, Takafumi YAMAJI, Tetsuro ITAKURA

365-371
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Band Connections for Digital Substrate Noise Reduction Using Active Cancellation Circuits

Hiroto SUZUKI, Kazuyuki WADA, Yoshiaki TADOKORO

372-379
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Evaluation of Isolation Structures against High-Frequency Substrate Coupling in Analog/Mixed-Signal Integrated Circuits

Daisuke KOSAKA, Makoto NAGATA, Yoshitaka MURASAKA, Atsushi IWATA

380-387
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Fast Transient Simulation of Power Distribution Networks Containing Dispersion Based on Parallel-Distributed Leapfrog Algorithm

Takayuki WATANABE, Yuichi TANJI, Hidemasa KUBOTA, Hideki ASAI

388-397
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A Unified Framework of Subspace Identification for D.O.A. Estimation

Akira TANAKA, Hideyuki IMAI, Masaaki MIYAKOSHI

419-428
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Codeblock-Based Error Concealment for JPEG2000 Coded Image Transmission over RTP

Khairul MUNADI, Masaaki FUJIYOSHI, Kiyoshi NISHIKAWA, Hitoshi KIYA

429-438
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Design of FIR Digital Filters Using Hopfield Neural Network

Yue-Dar JOU, Fu-Kun CHEN

439-447
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Analysis of Piecewise Constant Models of Current Mode Controlled DC-DC Converters

Takahiro KABE, Sukanya PARUI, Hiroyuki TORIKAI, Soumitro BANERJEE, Toshimichi SAITO

448-456
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Cache Efficient Radix Sort for String Sorting

Waihong NG, Katsuhiko KAKEHI

457-466
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On an Optimal Maintenance Policy for a Markovian Deteriorating System with Uncertain Repair

Nobuyuki TAMURA

467-473
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An Efficient and Leakage-Resilient RSA-Based Authenticated Key Exchange Protocol with Tight Security Reduction

SeongHan SHIN, Kazukuni KOBARA, Hideki IMAI

474-490
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Universal Lossy Coding for Individual Sequences Based on Complexity Functions

Shigeaki KUZUOKA, Tomohiko UYEMATSU

491-503
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Butterfly Structure for Viterbi Decoders of All Rates k/n

Tsung Sheng KUO, Chau-Yun HSU

504-510
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