Vol. E89-A, No. 4 April 2006

Published: 2006-04-01

Foreword

FOREWORD

Yoshifumi NISHIO

839-839
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Letters

Design of IIR Digital Filters with Discrete Coefficients Based on MLS Criterion

Masayoshi NAKAMOTO, Takao HINAMOTO

1116-1121
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Robustness Bounds for Receding Horizon Controls of Continuous-Time Systems with Uncertainties

ChoonKi AHN, SooHee HAN, WookHyun KWON

1122-1125
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Connectivity-Based Image Watermarking

Jian LUO, Hongxia WANG

1126-1128
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DWT Domain On-Line Signature Verification Using the Pen-Movement Vector

Isao NAKANISHI, Hiroyuki SAKAMOTO, Naoto NISHIGUCHI, Yoshio ITOH, Yutaka FUKUI

1129-1131
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A Code Whose Codeword Length is Shorter than n in Almost All of Sufficiently Large Positive Integers

Hirofumi NAKAMURA, Sadayuki MURASHIMA

1132-1139
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Lower Bounds on Two-Dimensional Generalized Orthogonal Sequences

Fanxin ZENG, Zhenyu ZHANG, Lijia GE

1140-1144
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Bootstrapped Modified Weighted Bit Flipping Decoding of Low Density Parity Check Codes

Yoichi INABA, Tomoaki OHTSUKI

1145-1149
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Diversity Combining for Soft/Softer Hand-Over in DS-CDMA

Jungwoo LEE

1150-1153
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Per-User Automatic Gain Control for an Uplink CDMA Receiver

Jungwoo LEE

1154-1157
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Papers

Modeling the Influence of Input-to-Output Coupling Capacitance on CMOS Inverter Delay

Zhangcai HUANG, Atsushi KUROKAWA, Yun YANG, Hong YU, Yasuaki INOUE

840-846
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Formula-Based Method for Capacitance Extraction of Interconnects with Dummy Fills

Atsushi KUROKAWA, Akira KASEBE, Toshiki KANAMOTO, Yun YANG, Zhangcai HUANG, Yasuaki INOUE, Hiroo MASUDA

847-855
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Determination of Interconnect Structural Parameters for Best- and Worst-Case Delays

Atsushi KUROKAWA, Hiroo MASUDA, Junko FUJII, Toshinori INOSHITA, Akira KASEBE, Zhangcai HUANG, Yasuaki INOUE

856-864
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A Method to Derive SSO Design Rule Considering Jitter Constraint

Koutaro HACHIYA, Hiroyuki KOBAYASHI, Takaaki OKUMURA, Takashi SATO, Hiroki OKA

865-872
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Investigation of Class E Amplifier with Nonlinear Capacitance for Any Output Q and Finite DC-Feed Inductance

Hiroo SEKIYA, Yoji ARIFUKU, Hiroyuki HASE, Jianming LU, Takashi YAHAGI

873-881
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A Chaotic Burst in a Modified Discrete-Time Neuron Model

Hiroto TANAKA

882-886
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Dead Problem of Program Nets

Shingo YAMAGUCHI, Kousuke YAMADA, Qi-Wei GE, Minoru TANAKA

887-894
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Entropy Based Associative Memory

Masahiro NAKAGAWA

895-901
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A CMOS Watchdog Sensor for Certifying the Quality of Various Perishables with a Wider Activation Energy

Ken UENO, Tetsuya HIROSE, Tetsuya ASAI, Yoshihito AMEMIYA

902-907
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Complex Bandpass ΔΣAD Modulator Architecture without I, Q-Path Crossing Layout

Hao SAN, Akira HAYAKAWA, Yoshitaka JINGU, Hiroki WADA, Hiroyuki HAGIWARA, Kazuyuki KOBAYASHI, Haruo KOBAYASHI, Tatsuji MATSUURA, Kouichi YAHAGI, Junya KUDOH, Hideo NAKANE, Masao HOTTA, Toshiro TSUKADA, Koichiro MASHIKO, Atsushi WADA

908-915
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High-Speed Continuous-Time Subsampling Bandpass ΔΣ AD Modulator Architecture Employing Radio Frequency DAC

Masafumi UEMORI, Haruo KOBAYASHI, Tomonari ICHIKAWA, Atsushi WADA, Koichiro MASHIKO, Toshiro TSUKADA, Masao HOTTA

916-923
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Nonlinear Blind Source Separation Method for X-Ray Image Separation

Nuo ZHANG, Jianming LU, Takashi YAHAGI

924-931
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A Hardware Implementation of a Content-Based Motion Estimation Algorithm for Real-Time MPEG-4 Video Coding

Shen LI, Takeshi IKENAGA, Hideki TAKEDA, Masataka MATSUI, Satoshi GOTO

932-940
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Real-Time Human Object Extraction Method for Mobile Systems Based on Color Space Segmentation

Gen FUJITA, Takaaki IMANAKA, Hyunh Van NHAT, Takao ONOYE, Isao SHIRAKAWA

941-949
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Speech Noise Reduction System Based on Frequency Domain ALE Using Windowed Modified DFT Pair

Isao NAKANISHI, Yuudai NAGATA, Takenori ASAKURA, Yoshio ITOH, Yutaka FUKUI

950-959
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An Active Noise Control System Based on Simultaneous Equations Method without Auxiliary Filters

Mitsuji MUNEYASU, Osamu HISAYASU, Kensaku FUJII, Takao HINAMOTO

960-968
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Partially-Parallel LDPC Decoder Achieving High-Efficiency Message-Passing Schedule

Kazunori SHIMIZU, Tatsuyuki ISHIKAWA, Nozomu TOGAWA, Takeshi IKENAGA, Satoshi GOTO

969-978
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Scalable VLSI Architecture for Variable Block Size Integer Motion Estimation in H.264/AVC

Yang SONG, Zhenyu LIU, Satoshi GOTO, Takeshi IKENAGA

979-988
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Thermal-Aware Placement Based on FM Partition Scheme and Force-Directed Heuristic

Jing LI, Hiroshi MIYASHITA

989-995
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Selective Low-Care Coding: A Means for Test Data Compression in Circuits with Multiple Scan Chains

Youhua SHI, Nozomu TOGAWA, Shinji KIMURA, Masao YANAGISAWA, Tatsuo OHTSUKI

996-1004
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Practical Fast Clock-Schedule Design Algorithms

Atsushi TAKAHASHI

1005-1011
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Hardware Design Verification Using Signal Transitions and Transactions

Nobuyuki OHBA, Kohji TAKANO

1012-1017
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Synchronization Mechanism for Timed/Untimed Mixed-Signal System Level Design Environment

Yu LIU, Satoshi KOMATSU, Masahiro FUJITA

1018-1026
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Analysis of Automation Surprises in Human-Machine Systems with Time Information

Masakazu ADACHI, Toshimitsu USHIO

1027-1034
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Label Size Maximization for Rectangular Node Labels

Shigeki TORIUMI, Hisao ENDO, Keiko IMAI

1035-1041
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On Minimum k-Edge-Connectivity Augmentation for Specified Vertices of a Graph with Upper Bounds on Vertex-Degree

Toshiya MASHIMA, Satoshi TAOKA, Toshimasa WATANABE

1042-1048
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Experimental Evaluation of Maximum-Supply Partitioning Algorithms for Demand-Supply Graphs

Satoshi TAOKA, Kazuya WATANABE, Toshimasa WATANABE

1049-1057
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A Two-Stage Method for Single-Channel Speech Enhancement

Mohammad E. HAMID, Takeshi FUKABAYASHI

1058-1068
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A Novel Wavelet-Based Notch Filter with Controlled Null Width

Yung-Yi WANG, Ying LU, Liang-Cheng LEE

1069-1075
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Low-Voltage Analog Switch in Deep Submicron CMOS: Design Technique and Experimental Measurements

Christian Jesus B. FAYOMI, Mohamad SAWAN, Gordon W. ROBERTS

1076-1087
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Chaotification of the Van der Pol System Using Jerk Architecture

Sinuhe BENITEZ, Leonardo ACHO, Ricardo J.R. GUERRA

1088-1091
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Robust Chaotic Message Masking Communication over Noisy Channels: The Modified Chaos Approach

Chian-Song CHIU, Tung-Sheng CHIANG, Peter LIU

1092-1099
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Robust Fuzzy Integral Regulator Design for a Class of Affine Nonlinear Systems

Tung-Sheng CHIANG, Chian-Song CHIU, Peter LIU

1100-1107
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Fingerprinting Protocol for On-Line Trade Using Information Gap between Buyer and Merchant

Minoru KURIBAYASHI, Hatsukazu TANAKA

1108-1115
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