Vol. E88-A, No. 4 April 2005

Published: 2005-04-01

Foreword

FOREWORD

Mitsuji MUNEYASU

809-809
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Letters

A Note on the Complexity of Scheduling for Precedence Constrained Messages in Distributed Systems

Koji GODA, Toshinori YAMADA, Shuichi UENO

1090-1092
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On the Security of Signcryption Scheme with Key Privacy

Chik-How TAN

1093-1095
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The Stability of the Lattice Structure of Pseudorandom Number Sequences

Zhihua NIU, Enjian BAI, Guozhen XIAO

1096-1098
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Papers

Rigorous Verification of Poincare Map Generated by a Continuous Piece-Wise Linear Vector Field and Its Application

Hideaki OKAZAKI, Katsuhide FUJITA, Hirohiko HONDA, Hideo NAKANO

810-817
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Optimal Design of Sensor Parameters in PLC-Based Control System Using Mixed Integer Programming

Eiji KONAKA, Takashi MUTOU, Tatsuya SUZUKI, Shigeru OKUMA

818-824
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Path Following Circuits--SPICE-Oriented Numerical Methods Where Formulas are Described by Circuits--

Kiyotaka YAMAMURA, Wataru KUROKI, Hideaki OKUMA, Yasuaki INOUE

825-831
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Rail-to-Rail OTA Utilizing Linear V-I Conversion Circuit Whose Input Stage is Composed of Single Channel MOSFETs

Nobukazu TAKAI, Keigo KAWAI

832-837
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Unified Phase Compiler by Use of 3-D Representation Space

Takefumi MIYOSHI, Nobuhiko SUGINO

838-845
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Memory Allocation and Code Optimization Methods for DSPs with Indexed Auto-Modification

Yuhei KANEKO, Nobuhiko SUGINO, Akinori NISHIHARA

846-854
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A Noise Reduction Method Based on Linear Prediction with Variable Step-Size

Arata KAWAMURA, Youji IIGUNI, Yoshio ITOH

855-861
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Quantitative Evaluation of State-Preserving Leakage Reduction Algorithm for L1 Data Caches

Reiko KOMIYA, Koji INOUE, Vasily G. MOSHNYAGA, Kazuaki MURAKAMI

862-868
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Bitwidth Optimization for Low Power Digital FIR Filter Design

Kosuke TARUMI, Akihiko HYODO, Masanori MUROYAMA, Hiroto YASUURA

869-875
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Sub-operation Parallelism Optimization in SIMD Processor Core Synthesis

Hideki KAWAZU, Jumpei UCHIDA, Yuichiro MIYAOKA, Nozomu TOGAWA, Masao YANAGISAWA, Tatsuo OHTSUKI

876-884
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Performance Limitation of On-Chip Global Interconnects for High-Speed Signaling

Akira TSUCHIYA, Masanori HASHIMOTO, Hidetoshi ONODERA

885-891
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Clock Period Minimization Method of Semi-Synchronous Circuits by Delay Insertion

Yukihide KOHIRA, Atsushi TAKAHASHI

892-898
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Architecture of IEEE802.11i Cipher Algorithms for Embedded Systems

Yukio MITSUYAMA, Motoki KIMURA, Takao ONOYE, Isao SHIRAKAWA

899-906
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An Integrated Approach of Variable Ordering and Logic Mapping into LUT-Array-Based PLD

Tomonori IZUMI, Shin'ichi KOUYAMA, Hiroyuki OCHI, Yukihiro NAKAMURA

907-914
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Verifying Trace Equivalence of a Shared-Memory-Style Communication System

Yoshinobu KAWABE, Ken MANO

915-922
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Iterative Parallel Genetic Algorithms Based on Biased Initial Population

Morikazu NAKAMURA, Naruhiko YAMASHIRO, Yiyuan GONG, Takashi MATSUMURA, Kenji ONAGA

923-929
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Constant Time Generation of Set Partitions

Shin-ichiro KAWANO, Shin-ichi NAKANO

930-934
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Fault-Tolerant Meshes with Constant Degree

Toshinori YAMADA

935-940
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Making Reactive Systems Highly Reliable by Hypersequential Programming

Naoshi UCHIHIRA

941-947
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IP Paging Schemes Adaptive to Mobile Host Parameters

Hung Tuan DO, Yoshikuni ONOZATO

948-953
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A Linear Time Algorithm for Bi-Connectivity Augmentation of Graphs with Upper Bounds on Vertex-Degree Increase

Takanori FUKUOKA, Toshiya MASHIMA, Satoshi TAOKA, Toshimasa WATANABE

954-963
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Siphon-Trap-Based Algorithms for Efficiently Computing Petri Net Invariants

Akihiro TAGUCHI, Atsushi IRIBOSHI, Satoshi TAOKA, Toshimasa WATANABE

964-971
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Adaptive Microphone Array System with Two-Stage Adaptation Mode Controller

Yang-Won JUNG, Hong-Goo KANG, Chungyong LEE, Dae-Hee YOUN, Changkyu CHOI, Jaywoo KIM

972-977
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Equalizer-Aided Time Delay Tracking Based on L₁-Normed Finite Differences

Jonah GAMBA, Tetsuya SHIMAMURA

978-987
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Fixed-Lag Smoothing Algorithm under Non-independent Uncertainty

Seiichi NAKAMORI, Aurora HERMOSO- CARAZO, Josefa LINARES- PEREZ

988-995
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A Low-Power, Small-Size 10-Bit Successive-Approximation ADC

Mehdi BANIHASHEMI, Khayrollah HADIDI, Abdollah KHOEI

996-1006
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Globally Guaranteed Robustness Adaptive Fuzzy Control with Application on Highly Uncertain Robot Manipulators

Chian-Song CHIU

1007-1014
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Minimization of Reversible Wave Cascades

Dimitrios VOUDOURIS, Stergios STERGIOU, George PAPAKONSTANTINOU

1015-1023
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Diagnosis of Timing Faults in Scan Chains Using Single Excitation Patterns

James Chien-Mo LI

1024-1030
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A Low Latency Asynchronous FIFO Combining a Wave Pipeline with a Handshake Scheme

Jeong-Gun LEE, Suk-Jin KIM, Jeong- A LEE, Kiseon KIM

1031-1037
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SPFD-Based Flexible Transformation of LUT-Based FPGA Circuits

Katsunori TANAKA, Shigeru YAMASHITA, Yahiko KAMBAYASHI

1038-1046
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Reliability Analysis of a Convolutional-Code-Based Packet Level FEC under Limited Buffer Size

Masayuki ARAI, Satoshi FUKUMOTO, Kazuhiko IWASAKI

1047-1054
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A Flexible-Revocation Scheme for Efficient Public-Key Black-Box Traitor Tracing

Tatsuyuki MATSUSHITA, Hideki IMAI

1055-1062
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Source Coding Algorithms Using the Randomness of a Past Sequence

Jun MURAMATSU

1063-1083
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Analysis and Design of Multistage Low-Phase-Noise CMOS LC-Ring Oscillators

Jaesang LIM, Jaejoon KIM, Beomsup KIM

1084-1089
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